`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 11/28/2019 04:49:57 PM
// Design Name: 
// Module Name: button_stablizer
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module button_stablizer(
    input wire clk100m,
    input wire but,
    output reg but_stab
    );
    
    integer counter;
    
    initial
    begin
        counter = 0;
    end
    
    always @ (posedge clk100m)
    begin
        counter <= counter + 1;
        if (counter > 1000000)
        begin
            but_stab <= but;
            counter <= 0;
        end
    end
    
endmodule
